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TPMC630 FPGA PMC Module with 64 TTL or 32 Differential I/Os
TPMC630 Block Diagram
PIM Module with 68 Pin SCSI-3 Type Connector
TA104-10 1.8m Cable with HD-68 Connectors
TA203-10 68 Pin Terminal Block with HD-68
Connector
TA304-10 Connection Kit 1.8m Cable with HD-68 Connectors
and 68 pin Terminal Block |
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User Configurable FPGA with
600.000 System Gates
The TPMC630 is a standard single-width 32 bit PMC module
providing a user configurable FPGA with 300.000 system gates (XC2S300E)
or 600.000 system gates (XC2S600E). The
TPMC630-10 has 64 ESD-protected TTL lines, the TPMC630-11 provides 32
differential I/O lines using EIA-422 / EIA-485 compatible, ESD-protected
line transceivers. The TPMC630-12 provides 32 TTL and 16 differential
I/Os. All lines are individually programmable as input, output or
tri-state. The receivers are always enabled, which allows determining
the state of each I/O line at any time. Each TTL I/O line has a pull-up
resistor. The pull-up voltage is selectable to be either +3.3V or +5V.
The differential I/O lines are terminated by 120Ω resistors.
The FPGA is configured by a serial Flash. The Flash device is in-system
programmable via driver software over the PCI bus. An in-circuit
debugging option is available via an optionally mountable JTAG header
(on the backside of the board) for read back and real-time debugging of
the FPGA design (using Xilinx “ChipScope”). User applications can be
developed using the design software ISE WebPACK which can be downloaded
free of charge from www.xilinx.com.
The TPMC630 provides front panel I/O via a HD68 SCSI-3 type connector
and rear panel I/O via P14.
A wide range of drivers is available: Linux, LynxOS, OS-9, pSOS+, QNX,
VxWorks and Windows. All drivers - except the Windows drivers - are
supplied as C source code.
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Product Specification
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PMC module, 32 bit/33MHz PCI interface, IEEE P1386.1
compliant, PCI 2.1 compliant, 3.3V and
5V Vio, 32 bit PCI target interface by PLX PCI9030
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FPGA with 300.000 system gates(XC2S300E) or 600.000
system gates (XC2S600E)
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Xilinx XC2S300E-6 Spartan-IIE FPGA configured
by serial Flash XCF02S, Flash device in-system programmable
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FPGA clock options: Local clock oscillator or
PLL programmable clock generator (200 KHz – 166 MHz), 6 clock
outputs connected to FPGA
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I/O lines: 64 TTL I/O (-10), 32 differential
I/O (-11) or 32 TTL I/O and 16 differential I/O (-12), direction
individually programmable
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TTL signaling voltage (maximum current: +/-24 mA) or EIA-422/-485
signaling level
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Front panel or P14 I/O
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-40°C .. +85°C operating temperature range
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OS-9, pSOS+, Windows NT/2000/XP, Linux, LynxOS, QNX, and VxWorks drivers available
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5 years warranty
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Ordering Information |
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TPMC630-10R |
XC2S300E-6
FPGA PMC module with 64 TTL I/Os |
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TPMC630-11R |
XC2S300E-6
FPGA PMC module with 32 differential I/Os |
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TPMC630-12R |
XC2S300E-6
FPGA PMC module with 32 TTL and 16 differential I/Os |
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TPMC630-20R |
XC2S600E-6
FPGA PMC module with 64 TTL I/Os |
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TPMC630-21R |
XC2S600E-6
FPGA PMC module with 32 differential I/Os |
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TPMC630-22R |
XC2S600E-6
FPGA PMC module with 32 TTL and 16 differential I/Os |
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TA104-10 |
1.8m cable with HD-68 connectors |
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TA203-10 |
68 pin terminal block with HD-68 connector |
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TA304-10 |
Connection kit 1.8m cable with HD-68 connectors and 68 pin terminal block |
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TPIM003-10
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PIM module with 68 pin SCSI-3 type connector
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TDRV004-SW-12
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OS-9 driver
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TDRV004-SW-32
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pSOS, pSOS+ driver
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TDRV004-SW-42
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VxWorks driver
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TDRV004-SW-62
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Windows NT 4.0 driver
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TDRV004-SW-65
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Windows 2000/XP driver
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TDRV004-SW-72
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LynxOS driver
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TDRV004-SW-82
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LINUX driver
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TDRV004-SW-92
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QNX 4 driver
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TDRV004-SW-95
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QNX 6 driver
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TPMC630-DOC
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TPMC630 Reconfigurable FPGA with 64 TTL I/O / 32 Differential I/O User Manual
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TPMC630-ED
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Engineering Documentation
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TPIM003-DOC
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TPIM003-10 PIM I/O Module User Manual
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