NAT-MCH-PHYS80

NAT-MCH-PHYS80 MicroTCA Carrier Hub for MTCA.4 and MTCA.4.1 applications

The NAT-MCH-PHYS80 consists of the NAT-MCH base, the NAT-MCH-CLK-PHYS and an 80-port PCIe Gen3 switch. Combined with the Rear Transition Module with quad-core Intel Xeon E3 CPU this is the most powerful single-slot solution for management, data switching, and processing that is available for MTCA.4 and MTCA.4.1 systems.

The NAT-MCH-CLK-PHYS clock module is specially designed for physics applications, providing a very low-jitter and low-latency clock at CLK1 and CLK2 and a fixed mean 100MHZ PCIe clock. The NAT-MCH-PHYS80 is capable of sourcing an external clock from, or delivering an internal clock to, two SMA inputs or outputs on the front panel. This allows installations of many MTCA systems to be synchronized to a central clock source in a very elegant and easy-to-use way.

The PCIe hub module provides an 80-port PCIe Gen3 switch that allows each of the 12 AMCs in a MicroTCA.4.x system to be connected by a x4 link. It provides either two x8 or one x16 optional optical PCIe uplink(s) to external high performance servers or other MTCA.4 systems. The MCH-RTM is connected by an x16 link. The PCIe switch also accommodates higher bandwidths, i.e. x8 or x16, to a reduced number of AMC slots if the backplane provides appropriate connectivity. The PCIe switch provides the ability to establish up to four virtual PCIe clusters and assign the AMC slots to these. The up to four PCIe Root Complexes can be any of the AMC-CPUs, the NAT-MCH-RTM CPU or an external PC.

When used together with its Rear Transition Module, the NAT-MCH-PHYS80 also connects the optional quad-core Intel Xeon E3 COM Express module with a x16 link to the PCIe Gen3 switch. As the fully user-accessible quad-core Intel Xeon E3 on the NAT-MCH-RTM can act as a PCIe root complex, this x16 PCIe link overcomes the bottle neck between the root complex and many PCIe based I/O payload AMCs, which in most MTCA.4 systems are connected by a x4 link only.

The NAT-MCH-PHYS80 can be equipped with SSD storage that will then turn the combination of NAT-MCH-PHYS80 and NAT-MCH-RTM with e.g. COMex-E3 into a true single-slot fully user-accessible root complex at PCIe Gen3 speed.

MTCA.4.1 allows the use of an optional LLRF backplane behind the standard AMC backplane. One of its purposes is to distribute high precision RF and CLK signals among eRTMs and standard RTMs. Using a NAT-MCH-PYS80 with a NAT-MCH-RTM-BM-FPGA allows managing eRTMs as well as uRTMs and the additional power modules (RTM-PM) connected to the LLRF backplane. The NAT-MCH-PHYS80 can handle up to four -48V, +24V or AC power modules or a combination of them for N+1 configurations. The NAT-MCH-PHYS80 together with the NAT-MCH-RTM-BM (LLRF backplane management) can handle in addition up to two rear power modules.

The NAT-MCH-PYS80 can be monitored and controlled with any RMCP-based System Management Software like NATview or Ipmitool. Furthermore, using the NAT-MIB the NAT-MCH-PHYS80 can also be integrated into environments based on the Simple Network Management Protocol (SNMP). The NAT-MCH-PHYS80 can be configured using either uploadable text based script files or via the integrated web interfaces using a standard web browser.

The NAT-MCH-PHYS80 is ideal for use in our MicroTCA starter kits.

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Technical Description

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  • MicroTCA Carrier Hub, MTCA.0, MTCA.1, MTCA.4 and MicroTCA.4.1 compliant
  • 200MHz NXP Freescale ColdFire MCF54452 CPU with up to 64MB DDR2 RAM and up to 64 MB Flash
  • Management for 12 AMC modules and optional AMC13 in 2nd MCH slot, 2 front and 2 rear cooling units and 1-4 power units incl. N+1 redundancy
  • Management of 4 eRTMs and 2 rear power modules via LLRF backplane
  • Supports redundant architectures and fail-over procedure
  • Supports configurable emergency shutdown of AMCs or entire system
  • Support for MCH rear transition module (NAT-MCH-RTM)
  • Fabric A: Gigabit Ethernet
    • 12 AMCs + opt. AMC13 in 2nd MCH slot
  • Fabric D-G: PCI Express Gen 3
    • x1 or x4 to 12 AMCs
    • One x16 or two x8 to optical uplink (optional)
    • x16 to RTM or to one AMC slot (requires backplane support)
  • Clock generation and distribution by special clock module for Physics (NAT-MCH-CLK-PHYS)
  • CLK1 and CLK2 by special low jitter and low latency circuitry
  • CLK3 fixed mean 100MHz PCIe clock (HCSL)
  • Two GbE front panel ports for management and uplink
  • One serial (RS-232) and one USB console front panel port
  • Fabric D-G uplink (two x8 or one x16) front panel port
  • 2 SMA front panel ports for external CLK support
  • Support NATview
  • 34 status LEDs, 3 standard AMC LEDs, 12 LEDs for AMC slots, 2 cooling unit LEDs, 4 LEDs for power units and 13 LEDS for PCIe link status
  • 2 years warranty

 

 

Order Information

NAT-MCH-PHYS80

NAT-MCH, 16 GbE, PCIe x4, special Physics Clock module, double full-size

NAT-MCH-PHYS80-UPLNK

NAT-MCH, 16 GbE, PCIe x4, special Physics Clock module, optical uplinks for PCIe (two x8 or one x16), double full-size

NAT-MCH-RTM-UPLNK

RTM, double full size with one copper uplink (x16) for PCIe

NAT-MCH-RTM

RTM, double full size and COM Express carrier

NAT-MCH-RTM-BM

RTM, double full size and COM Express carrier, backplane management and zone 2 connector for µRTM backplanes eg LLRF backplane

NAT-MCH-RTM-BM-FPGA

As NAT-MCH-RTM-BM plus ZYNQ-FPGA to implement separate bus eg SPI on LLRF backplane to access eRTMs

NAT-MCH-COMex-E3

COM Express Module Type 6 with Quad Core 2.0 GHz Xeon E3-1505LV5, 16GB RAM

NATView EASY

Java based GUI for monitoring and supervising of MTCA systems

NATView PRO

Java based GUI for monitoring and supervising of MTCA systems with SEL saver, FRU editor, e-keying viewer, link display

Technical Documentation

NAT-MCH-PHYS80 data sheet

NAT-MCH user manual

NAT-MCH-Phys user manual

NAT-MCH-PCIex80 user manual

NAT-MCH-Ethx user manual

NAT-MCH-Clk-Phys user manual

NAT-MCH-Clk-v4x user manual