TQMC700

FPGA Module with 8 18-bit Analog Inputs, 4 16-bit Analog Outputs and 16 Digital TTL I/O

QMC module providing a user programmable Xilinx Artix-7 XC7A50T-2 FPGA. The TEWS Technologies TQMC700 provides 14 ESD-protected 5 V-tolerant TTL lines. All I/O lines are individually programmable as input or output. The TTL I/O lines can be set to high, low, or tristate. Each TTL I/O line has a pull-resistor to a common programmable pull-up voltage that can be set so +3.3 V, +5 V and GND.
The 18 bit ADC offers 8 input channels each of them has a sampling rate of up to 1 Msps. Each channel can be operated in bipolar single-ended, unipolar single-ended and bipolar differential mode. In the single-ended modes it offers software selectable input voltage ranges of 0-5 V, 0-10 V, 0-12.5 V, ±2.5 V, ±5 V, ±6.25 V, ±10 V and ±12.5V. In differential mode the input voltages are selectable between ±5 V, ±10 V, ±12.5 V and ±20 V.
The DAC offers 4 channels of 16 bit analog outputs with software selectable output voltage ranges of 0-5 V, 0-10V, 0-10.8 V, ±5 V, ±10 V or ±10.8 V. The output voltage range can be individually set per channel. The conversion time is typ. 10 μs and the DAC outputs are capable to drive a load of 2 kΩ, with a capacitance up to 4000 pF.

The FPGA is configured by a SPI flash. An in-circuit debugging option is available via a JTAG header for read back and real-time debugging of the FPGA design.

Each TQMC700 is factory calibrated. The calibration information is stored in an on-board serial EEPROM unique to each TQMC700 module.

User applications for the TQMC700 with 7A50T FPGA can be developed using the design software Vivado Design Suite HL WebPACK Edition, which can be downloaded free of charge from www.xilinx.com.

Integrity, VxWorks, QNX, Windows, and Linux drivers are available.