IC-FEP-VPX3b 3U VPX Board with Xilinx Virtex-6 Processor and FMC Site

The 3U 4HP VPX board provides an user configurable Xilinx Virtex-6 FPGA and a FMC site. The Xilinx Virtex-6 XC6VSX315T FPGA of the INTERFACE CONCEPT's IC-FEP-VPX3b has 1,344 DSP, 49,200 configurable logic blocks, 314,880 logic cells and up to 25,344 RAM blocks. The FPGA is configured via JTAG header. The Virtex-6 FPGA is interfaced with its Mirror flash and a SPI flash through a Spartan-6 FPGA (LX-45T).

4 GB DDR3-800 SDRAM and 9 MB DDR2+ SRAM are available. I/O processing is handled on a separate VITA 57.1 FMC module that plugs into the FPGA base board. A variety of these external I/O cards offer an interface for your analogue and digital I/O signals.

The fabric links of the backplane allow data rates up to 6,5 Gbps per lane depending on the typ of the interface (PCIe Gen 2, Aurora or SRIO available thanks to specific IP). In addition four Gigabit Ethernet ports, 16 LVDS, and 16 Differential ports are available on the backplane.


Technical Description

  • 3U/4HP VPX CPU board, VITA 46.0, VITA 46.11, VITA 57.1 conform
  • Xilinix Virtex-6 XC6VSX315T with 1,344 DSP slices, 49,200 configurable logic blocks, 314,000 logic cells and up to 25,344 RAM blocks, opt. LX315T or SX475T Virtex-6 FPGA
  • One FMC site, VITA 57.1
  • 4 GB DDR3-800 RAM
  • 9 MB DDR2+ RAM
  • 128 MB flash
  • 16 MB SPI flash
  • Spartan-6 LX-45T
  • Up to 6,5 Gb/s data rate per lane, depending on the type of the interface (PCIe Gen2, Aurora or SRIO)
  • 32 GPIOs on P2, 16 LVDS and 16 Differential pairs
  • Four GTX x4 ports
  • In 3 environmental classes available: standard (0°C .. 55°C), extended (-40°C .. +75°C), and conduction-cooled (-40°C .. +75°C)
  • 2 years warranty

Order Information


3U/4HP VPX board, Virtex-6 XC6VSX315T, FMC site, VITA 57.1


Quad 16bit 800 Ms/s DAC


Quad 16bit 135 Ms/s ADC


Quad 14bit 250 Ms/s ADC

Technical Documentation

IC-FEP-VPX3b Data Sheet